BIB-VERSION:: CS-TR-v2.0
          ID:: STAN//CSL-TR-94-639
       ENTRY:: October 05, 1994
ORGANIZATION:: Stanford University, Computer Systems Laboratory
       TITLE:: Two Case Studies in Latency Tolerant Architectures
        TYPE:: Technical Report
      AUTHOR:: Bennett, James E.
      AUTHOR:: Flynn, Michael J.
        DATE:: October 1994
       PAGES:: 22
    ABSTRACT:: Researchers have proposed a variety of techniques for dealing
               with memory latency, such as dynamic scheduling, hardware
               prefetching, software prefetching, and multiple contexts.
               This paper presents the results of two case studies on the
               usefulness of some simple techniques for latency tolerance.
               These techniques are nonblocking caches, reordering of loads
               and stores, and basic block scheduling for the expected
               latency of loads. The effectiveness of these techniques was
               found to vary according to the type of application. While
               nonblocking caches and load/store reordering consistently
               improved performance, scheduling based on expected latency
               was found to decrease performance in most cases. This result
               shows that the assumption of a uniform miss rate used by the
               scheduler is incorrect, and suggests that techniques for
               estimating the miss rates of individual loads are needed.
               These results were obtained using a new simulation
               environment, MXS, currently under development.
       NOTES:: [Adminitrivia V1/Prg/19941005]
         END:: STAN//CSL-TR-94-639