BIB-VERSION:: CS-TR-v2.0
          ID:: STAN//CSL-TR-93-588
       ENTRY:: November 02, 1994
ORGANIZATION:: Stanford University, Computer Systems Laboratory
       TITLE:: Update-Based Cache Coherence Protocols for Scalable
               Shared-Memory Multiprocessors
        TYPE:: Technical Report
      AUTHOR:: Glasco, David B.
      AUTHOR:: Delagi, Bruce A.
      AUTHOR:: Flynn, Michael J.
        DATE:: November 1993
       PAGES:: 26
    ABSTRACT:: In this paper, two hardware-controlled update-based cache
               coherence protocols are presented. The paper discusses the
               two major disadvantages of the update protocols: inefficiency
               of updates and the mismatch between the granularity of
               synchronization and the data transfer. The paper presents two
               enhancements to the update-based protocols, a write combining
               scheme and a finer grain synchronization, to overcome these
               disadvantages. The results demonstrate the effectiveness of
               these enhancements that, when used together, allow the
               update-based protocols to significantly improve the execution
               time of a set of scientific applications when compared to
               three invalidate-based protocols.
       NOTES:: [Adminitrivia V1/Prg/19941102]
         END:: STAN//CSL-TR-93-588