BIB-VERSION:: CS-TR-v2.0
          ID:: STAN//CSL-TR-87-339
       ENTRY:: November 08, 1994
ORGANIZATION:: Stanford University, Computer Systems Laboratory
       TITLE:: MIPS-X: THE EXTERNAL INTERFACE
        TYPE:: Technical Report
      AUTHOR:: Salz, Arturo
      AUTHOR:: Agarwal, Anant
      AUTHOR:: Chow, Paul
        DATE:: November 1987
       PAGES:: 42
    ABSTRACT:: MIPS-X is a 20-MIPS-peak VLSI processor designed at Stanford
               University. This document describes the external interface of
               MIPS-X and the organization of the MIPS-X processor system,
               including the external cache and coprocessors. The external
               interface has been designed to optimize the paths between the
               processor, the external cache and the coprocessors. The
               signals used by the processor and their timing are documented
               here. Signal use and timings during exceptions and cache
               misses are also shown.
       NOTES:: [Adminitrivia V1/Prg/19941108]
         END:: STAN//CSL-TR-87-339