BIB-VERSION:: CS-TR-v2.0
          ID:: STAN//CSL-TR-76-115
       ENTRY:: December 01, 1994
ORGANIZATION:: Stanford University, Computer Systems Laboratory
       TITLE:: PRINCIPLES OF SELF-CHECKING PROCESSOR DESIGN AND AN EXAMPLE
        TYPE:: Technical Report
      AUTHOR:: Wakerly, John F.
        DATE:: December 1975
       PAGES:: 48
    ABSTRACT:: A self-checking processor has redundant hardware to insure
               that no likely failure can cause undetected errors and all
               likely failures are detected in normal operation. We show how
               error-detecting codes and self-checking circuits can be used
               to achieve these properties in a microprogrammed processor.
               The choice of error-detecting codes and the placement of
               checkers to monitor coded data paths are discussed. The use
               of codes to detect errors in arithmetic and logic operations
               and microprogram control units is described. An example
               processor design is given and some observations on the
               diagnosis and repair of such a processor are made. From the
               example design it appears that somewhat less than 50% overall
               redundancy is required to guarantee the detection of all
               failures that affect a single medium- or large-scale
               integration circuit package.
       NOTES:: [Adminitrivia V1/Prg/19941201]
         END:: STAN//CSL-TR-76-115