Report Number: CSL-TR-94-624
Institution: Stanford University, Computer Systems Laboratory
Title: WSIM: A Symbolic Waveform Simulator
Author: Franco, Piero
Author: McCluskey, Edward J.
Date: June 1994
Abstract: A symbolic waveform simulator is proposed in this report. The delay of faulty element is treated as a variable in the generation of the output waveform. Therefore, many timing simulations with different delay values do not have to be done to analyze the behavior of the circuit-under-test with the timing fault. The motivation for this work was to investigate delay testing by Output Waveform Analysis, where an accurate representation of the actual waveforms is required, although the simulator can be used for other applications as well (such as power analysis). Output Waveform Analysis will be briefly reviewed, followed by a description of both a simplified and a complete implementation of the waveform simulator, and simulation results.