Report Number: CSL-TR-93-579
Institution: Stanford University, Computer Systems Laboratory
Title: Comparative Studies of Pipelined Circuits
Author: Klass, Fabian
Author: Flynn, Michael J.
Date: July 1993
Abstract: Wave pipelining is an attractive technique used in high-speed
computer systems to speed-up pipeline rate without
partitioning a system into pipeline stages. Although recent
implemetations have reported very high-speed operation rates,
a real evaluation of the advantages and disadvantages of wave
pipelining requires a comparative study with other
techniques, in particular the understanding of the trade-offs
between conventional and wave pipelining is very important.
This study is an attempt to provide approximate models which
can be used as first-order tools for comparative study or
sensitivity analysis of conventional and wave pipelined
systems with different overheads. The models presented here
are for subsystem-level pipelines. The product Latency x
Cycle-Time is used as a measure of performance and is
evaluated as a function of all the parameters of a design,
such as the propagation delay of the combinational logic, the
data skew resulting from the difference between maximum and
minimum propagation delays through various logic paths, rise
and fall time, the setup time, hold time, and propagation
delay through registers, and the uncontrollable clock skew.
In this way, an analytical basis is provided for a comparison
between different approaches and for optimizations.