Report Number: CSL-TR-86-300
Institution: Stanford University, Computer Systems Laboratory
Title: An overview of the MIPS-X-MP project
Author: Hennessy, John L.
Author: Horowitz, Mark A.
Date: April 1986
Abstract: MIPS-X-MP is a research project whose end goal is to build a small (workstation-sized) multiprocessor with a total throughput of 100-200 mips. The architectural approach uses a small number (tens) of high performance RISC-based microprocessors (10-20 mips each) The multiprocessor architecture uses software-controlled cache coherency to allow cooperation among processors without sacrificing performance of the processors. Software technology for automatically decomposing problems to allow the entire machine to be concentrated on a single problem is a key component of the research. This report surveys the four key components of the project: high performance VLSI processor architecture and design, multiprocessor architectural studies, multiprocessor programming systems, and optimizing compiler technology.
http://i.stanford.edu/pub/cstr/reports/csl/tr/86/300/CSL-TR-86-300.pdf