Report Number: CSL-TR-81-226
Institution: Stanford University, Computer Systems Laboratory
Title: SILT: a VLSI design language
Author: Davis, Tom
Author: Clark, James
Date: October 1982
Abstract: SILT is an efficient, medium-level language to describe VLSI
layout. Layout features are described in terms of a
coordinate system based on the concept of relative geometry.
SILT provides hierarchical cell description, a library format
for parameterized cells with defaults for the parameters,
constraint checking (but not enforcement), and some name
control. It is designed to be used with a graphical
interface, but can be used by itself.