Report Number: CSL-TR-75-102
Institution: Stanford University, Computer Systems Laboratory
Title: High performance emulation
Author: Wallach, Walter A. Jr.
Date: November 1975
Abstract: The Stanford EMMY is examined as an emulation engine. Using
the 360 emulator and the DELtran interpreter as examples, the
performance of the current EMMY architecture is examined as a
high performance emulation vehicle. The problems of using a
sequential, vertically organized processor for high speed
emulation are developed and discussed.
A flexible control structure for high speed emulation studies
is derived from an existing high performance processor. This
structure issues a stream of microinstructions to a central
command bus, allowing user-defined execution resources to
execute them in overlapped fashion. These execution resources
may be added or deleted with little or no processor rewiring.