Report Number: CS-TR-82-927
Institution: Stanford University, Department of Computer Science
Title: Combining state machines and regular expressions for
automatic synthesis of VLSI circuits
Author: Ullman, Jeffrey D.
Date: September 1982
Abstract: We discuss a system for translating regular expressions into
logic equations or PLA's, with particular attention to how we
can obtain both the benefits of regular expressions and state
machines as input languages. An extended example of the
method is given, and the results of our approach is compared
with hand design; in this example we use less than twice the
area of a hand-designed, machine optimized PLA.